(The following is a snippet of a note from Wes W7ZOI in reply to a question from Bill M0HBR)
The Soldersmoke podcast reminds me of an earlier good time. I got home from work one
day to find a little box in the mail from Doug DeMaw. Opening the box revealed an open
3 inch reel of magnetic tape. I borrowed a tape recorder at Tektronix and brought it
home so we could listen. It was an enjoyable hour long recording from Doug, complete
with a few words from Jean. I went out the next day and purchased a little Sony
recorder and generated a return tape. That was probably in 1971 or 72.
Doug and I continued with this practice for years afterward. Our free form rambling
was much like what I hear from you and Mike.
Let me end this with a technical note. You guys are both running homebrew sideband
gear, which is absolutely wonderful. There is adequate CW stuff out there, and there
needs to be more for SSB. The ARRL Challenge, even if flawed, will probably do
wonders here. You and Mike discuss the difficulty of getting up to power and the fact
that many stages are needed. So I thought I would offer some thoughts.
The solution here is to measure. I have a couple of spectrum analyzers and
several oscilloscopes and use one or more of these instruments for these chores.
I also use my little power meter. The important thing is not the tool that is
used, but the attitude taken during the building. Think in terms of power rather
than voltage.
I use numeric examples in the discussion that follows. Please don't take
the numbers literally, for they are just pulled out of the air. The main
thing I want to emphasize is the process that I used for the design.
Let's consider a DSB rig using a NE602 as the balanced modulator. How much power
can you get from this IC? How much power is there from the supply?
Well, the 602 runs at 6 volts (perhaps 5) and has a current of 2 mA.
The total power is then 12 mW. If this was an amplifier, you could expect a maximum
efficiency of about 30%, so the maximum power you could ever get would be 30% of 12 mW,
or 3.6 mW. That would be for the case of the output voltage making an excursion from
0 up to twice the power supply, which is what would happen if the amp was biased
from Vcc with an RF choke or tuned circuit and the emitter of the output transistor
was at ground. This is not the nature of the NE602. The output transistor has its
emitter at about half the supply, so the maximum swing we are going to get is starting
at 3V. Cutting V in two reduces the power by 4, which brings us down to about 1 mW
max output. And there is no RF choke, which is the mechanism that lets the signal
go up above Vcc. This cuts the output voltage by another factor of 2, dropping the
power output to 0.25 mW. Finally, there is a resistor in the IC that takes part
of the available output power. This resistor will dissipate about half of the
available output. This takes the available output power down to something like
0.1 mW, or -10 dBm. This is an absolute maximum. My intuition is that it is
going to be less than this, but let's go with this number for this example.
Now we can think about extracting the power. The output Z from one side is 1.5K.
We can design an L-network to drop this to 50 Ohms. We don't have to go to 50,
but it's a good thing, for that means that we can then measure our output signal.
A level of -10 dBm (at 50 Ohms) is not in the realm of RF probes or the like.
However, it is easily measured with a little AD8307 based power meter like the
one that Bob Larkin and I did in QST and is in EMRFD. It's cheap and simple,
and a tool that is hard to live without unless you have other similar things.
Alternatively, you could use a 50 Ohm terminated oscilloscope to measure such signals.
Put your terminator on the oscilloscope input connector, and then run a coax line from
the circuit board that has the L-net to the scope. We get a CW signal by putting a
dc signal on the LO input to unbalance the Gilbert cell. Let's assume that you
really do get -10 dBm. This will be 0.2 volts pk-pk across the 50 Ohm terminator
at the 'scope.
A quick 'scope formula for power is P(milliwatts) = 2.5 * V(pk-pk)^2.
We want to push this up to 5 W, or +37 dBm. That's a 47 dB difference.
If we were to do it in two stages, it would take 23.5 dB gain per stage average.
This is possible, but is a LOT. Three stages would be an average gain of about
16 dB per stage, which is well within reason.
Now comes the design of the small signal amplifier. This is done with FBA, another
EMRFD program shown in "billmike02.gif" There is a subtle thing here. With the low
emitter current of only 2.5 mA, the intrinsic emitter resistor, re, is high at 10.4.
Recall that re=26/Ie(mA). Hence, we may not need much external emitter degeneration,
which is just what happened. We would need more if we had used more standing current.
We get the gain we want with good input and output match with 2.2 Ohm emitter R
and 1K feedback from collector to base.
So how do we put it all together? This is in "billmike03.gif" Note that we used
an AC coupled 1.3K feedback R. This parallels with the already present 4.7K to yield
the desired 1K. This amplifier should be unconditionally stable.
Now we play the game again to get up to the next power plateau. Another 16 dB of
gain would bring us from +6 dBm to +22 dBm, or 158 mW. We go through similar
arguments and come up with a stage that stands more current. We can still use a
transformer in the output, but much higher and we would have to go to lower collector
load resistance.
This should give enough power to drive a IRF510 or a 2SC1969, etc. Perhaps the
PA takes a little more. All of this can be measured. A step attenuator does
wonders to let you start with a homebrew RF source where you measure the output
and then lets you use it to work your way up in the power chain.
Anyway, I have rambled way too long. I hope that this is of use in your design efforts.
I'll be watching your efforts with Soldersmoke -- keep up the good work and have fun.
73, Wes
0.2 ^ 2 = .04; multiply by 2.5 and you have 0.1.
10Log(P)=-10 dBm.
The first amplifier stage needs to get from -10 dBm up by 16 dB to +6 dBm, or 4 mW.
If things were optimum, we would get this from a stage with 30% efficiency.
Let's assume less, say 20%. So the DC input power must be 5 times this, or 20 mW.
If we are using a 12 volt power supply, it might make sense to drop 1 volt in the
power supply decoupling resistor, leaving 11 volts. Then we could bias the emitter
at 3 volts DC, high enough that we can easily establish good bias stability.
This leaves 11-3=8 V across the transistor. For a DC power of 20 mW, we will need
an emitter current of 20/8=2.5 mA.
The boundary conditions we have established tell us what we have to do for NPN biasing.
Pick a base divider that gives us about 3.6 volts, which then puts the emitter at 3.0.
Then pick an emitter R to set the current. The use of the biasnpn program from EMRFD
is shown in "billmike01.gif."
w7zoi